
Design for Test Engineer
Role summary
Apple is seeking a Design for Test Engineer in Austin, Texas. This role involves reviewing design specifications, developing verification plans, and working with designers to ensure DFT implementation. Responsibilities include creating test benches, generating random tests, debugging failures, running simulations, and managing coverage. The engineer will also assist with verification flows, automation scripts, and regressions, and collaborate with cross-functional teams for silicon bring-up. A Master's degree in Electrical Engineering or a related field is required, along with experience in VLSI design, Verilog, scripting languages (Perl/Python/Tcl), test automation, timing analysis, synthesis, simulation, and DFT.
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Description
APPLE INC has the following available in Austin, Texas. Review architecture and Design specifications. Extract design features and develop attributes and verification plans. Work with designers to verify DFT implementation and run various checks. Implement test benches, generating advised/constrained random tests. Debug failures, run RTL and gate level simulations, supervise bugs, and closing coverage. Handle schedules and support multi-functional engineering effort. Assist in verification flows, automation scripts and regressions. Work with cross functional teams to bring up test patterns and deliverables on silicon. 40 hours/week.
Preferred Qualifications
N/A
Minimum Qualifications
Master’s degree or foreign equivalent in Electrical Engineering or related field.
Experience and/or education must include:
Utilizing VLSI Design and VLSI Architecture knowledge to understand complex ASIC designs.
Using Verilog skills to debug and verify designs.
Utilizing Perl/Python or Tcl scripting to aid in automating scripts and internal tools.
Knowledge of CMOS devices and circuits.
Digital Logic Gate Analysis and Design.
Using Test Automation and Test Methodology for implementing large scale DV regressions.
Utilizing Timing Analysis to debug complex timing bugs.
Using Synthesis and Simulation to debug RTL and netlist issues.
Utilizing DFT knowledge for generating ATE patterns and ATE debug.
Using Memory Circuits knowledge for verifying memory operation behavior.
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant .
Sample Apple interview questions
- 1
Design a typeahead box for a search engine
system designmedium - 2
What is an API and how does it work?
technicalmedium - 3
Explain the differences between stack and heap memory allocation
technicalmedium - 4
Determine the latency for a hashmap with given data
technicalmedium - 5
Reverse a linked list
codingeasy
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