Lead Software Engineer, DFT/ATPG
Role summary
Cadence Design Systems is seeking a Lead Software Engineer for their Modus Test R&D team, focusing on Design For Test (DFT) and Automatic Test Pattern Generation (ATPG) software. The role involves building reliable, scalable, and high-performance software tools using C/C++ on Unix/Linux environments. Key responsibilities include developing software for DFT/ATPG, optimizing software architecture, and improving algorithm efficiency. Candidates should have a BS degree (or equivalent experience) and 7+ years of software development experience, with a strong understanding of algorithms, computer architecture, and code analysis tools. Experience in VLSI, DFT/ATPG, multi-threading, and distributed systems is highly desirable.
Cadence Design Systems is looking for a highly motivated engineer to work with the Modus Test R&D team working on Design For Test (DFT) and Automatic Test Pattern Generation (ATPG) Software.
What You'll Be Doing
- Work as a team to build reliable, scalable and high performance software that are easy to use by engineers worldwide
- Develop software tools in C/C++ to support DFT/ATPG
- Research and develop software solutions to allow greater efficiency in software architecture and algorithm optimizations
What We Need To See
- BS (or equivalent experience) and 7+ years of software development experience, MS preferred
- Experienced with modern C++, Unix/Linux and scripting
- Experienced with static and dynamic code analysis tools
- Solid understanding of algorithms, computer architecture and computer science theory
- Passionate about SW development processes
- Flexibility/adaptability for working in a dynamic environment with different frameworks and requirements
- Excellent communication, interpersonal and customer collaboration skills
Ways To Stand Out From The Crowd
- Experience in VLSI and/or DFT/ATPG.
- Experience with multi-threading and distributed software
- Experience in algorithmic and computational software