FPGA Verification Engineer - Avionics
Role summary
E-Space is seeking an FPGA Verification Engineer to develop and maintain the verification infrastructure for satellite avionics FPGA designs. This role involves creating UVM-based testbenches, coverage-driven verification plans, and ensuring RTL correctness for flight-critical firmware. Responsibilities include RTL simulation, clock-domain crossing verification, static analysis, and supporting hardware bring-up. The ideal candidate will have a Bachelor's or Master's degree in Electrical or Computer Engineering, 4+ years of experience in FPGA/ASIC verification, and strong expertise in SystemVerilog and UVM. Experience with space or high-reliability applications is preferred.
We are hiring FPGA Verification Engineers to build and maintain the verification infrastructure for satellite avionics FPGA designs. You will develop UVM-based testbenches, create coverage-driven verification plans, and ensure RTL correctness for flight-critical FPGA firmware across multiple subsystems. This role is instrumental in establishing a rigorous verification methodology for the program.
Key Responsibilities:
- Develop UVM-based verification environments including agents, scoreboards, and bit-accurate reference models.
- Create and maintain a reusable, extendable UVM framework supporting multiple FPGA targets and device configurations.
- Write verification plans derived from requirements specifications and architectural documents.
- Develop functional coverage models and drive coverage closure for all FPGA designs.
- Perform RTL simulation using industry-standard tools.
- Implement clock-domain crossing verification and timing/stability analysis.
- Apply lint and static-analysis tools to identify design issues early in the development cycle.
- Support hardware bring-up by creating tests that model and recreate hardware interactions in simulation.
- Document verification results, coverage metrics, and test plans with clear technical writing.
- Collaborate with FPGA designers and system engineers to refine requirements and close verification gaps.
Required Qualifications:
Preferred Qualifications:
- Experience verifying designs for space, aerospace, or high-reliability applications.
- Familiarity with formal verification tools.
- Background in embedded software interaction with FPGA firmware.
- Experience with continuous integration workflows for verification regressions.
- Proficiency in Python, TCL, or shell scripting for test automation and infrastructure.
- Exposure to DFMEA and high-reliability digital design review processes.
Tools & Technologies:
- Industry-standard RTL simulators (e.g., VCS, QuestaSim, or equivalent)
- UVM verification methodology
- Lint and CDC analysis tools
- Python/TCL scripting for automation