Silicon Validation Engineer (contract)

Silicon Validation Engineer (Contract)
*Please note that this is a contract role providing services to Microsoft through external staffing partners of Allegis Global Solutions. If you are selected for this role, you will be employed by AGS and will not be an employee of Microsoft.*
Summary
This position offers an exciting opportunity to contribute to cutting-edge silicon validation projects in a dynamic lab environment. The successful candidate will play a critical role in executing comprehensive validation and testing activities for upcoming silicon projects, working hands-on with new hardware as it arrives in the lab. This role requires a detail-oriented professional who can independently execute test plans, analyze results, and provide meaningful insights through first-level failure analysis. The ideal candidate will demonstrate strong ownership of test execution while collaborating effectively with cross-functional teams to ensure successful silicon validation outcomes. This position demands a results-oriented mindset and the ability to maintain system regressions while identifying and triaging issues using various debugging tools.
Job Responsibilities

• Execute validation testing based on established plans and schedules in a lab environment
• Run and maintain silicon system regressions to ensure consistent performance
• Analyze log files to summarize and report results from test runs
• Triage issues using various debugging tools and techniques
• Review and validate system updates made by other teams
• Perform PCB board, socket debug, and troubleshooting activities
• Conduct silicon debug and failure analysis across hardware, firmware, and system platforms
• Automate test runs to minimize downtime and improve efficiency
• Provide meaningful insights and first-level failure analysis from test results
• Collaborate with cross-functional teams to support silicon validation objectives

Requirements

• Minimum 5-7 years of experience with post-silicon validation testing
• Minimum 3-5 years of experience with PCB board, socket debug, and troubleshooting
• Minimum 1-3 years of experience with silicon debug and failure analysis across hardware, firmware, and system platforms
• Overall 8-10 years of relevant engineering experience
• Bachelor's degree in Electronics and Communication Engineering, Computer Engineering, or related engineering field required
• Expertise in Python, C, and C++ programming languages
• Knowledge of Verilog
• Strong analytical and problem-solving abilities
• Attention to detail and accuracy in test execution
• Ability to work independently with minimal supervision
• Strong communication skills for reporting results and insights
• Experience with various debugging tools and methodologies
• Capability to summarize complex technical information effectively

Additional Details

• Location: Mountain View, CA (Onsite)
• Duration: 1 month
• Pay Range\*: $72 - $81.50 per hour
• Weekly Schedule: 40 hours
• Job Status: Non-Exempt
• Application Deadline: Apply within 72 hours of the posting date to ensure consideration.

This Role Is Eligible For The Following Benefits

• Medical, dental & vision
• Hospital plans
• 401(k) Retirement Plan – Pre-tax and Roth post-tax contributions available
• Life Insurance (Company paid Basic Life and AD&D as well as voluntary Life & AD&D for the employee and dependents)
• Company paid short and long-term disability
• Health & Dependent Care Spending Accounts (HSA & DCFSA)
• Employee Assistance Program
• Time Off/Leave(PTO, Allegis Group Paid Family Leave, Parental Leave

*Benefits are subject to change and may be subject to specific elections, plan, or program terms.*
*AGS is an Equal Opportunity Employer and will consider all applications without regard to race, sex, age, color, religion, national origin, veteran status, disability, sexual orientation, gender identity, genetic information or any characteristic protected by law.*
*If you would like to request a reasonable accommodation, such as the modification or adjustment of the job application process or interviewing process due to a disability, please email accommodation@allegisglobalsolutions.com for other accommodation options.*
*In accordance with the Immigration Reform and Control Act of 1986, employment is contingent upon verification of identity and authorization to work in the United States. All persons hired will be required to complete Form I-9 and provide acceptable documentation as required by law.*
*Please note that we may use artificial intelligence (AI) tools to screen, assess, or select applicants for this position. These tools may analyze application materials and assist our team in identifying candidates whose qualifications best match the requirements of the role. If you have questions about our use of AI in the hiring process, or would like more information, please contact us.*

• We reserve the right to pay above or below the posted wage based on factors unrelated to protected classifications.

*Individual compensation offered for this position within this range will depend on many factors, including qualifications, skills, relevant experience, job knowledge, geographic location, internal equity, and other pertinent job-related factors.*
*San Francisco Candidates only: Pursuant to the San Francisco Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records.*
*City of Los Angeles Candidates only: We will consider for employment all qualified applicants, including those with criminal histories, in a manner consistent with the requirements of applicable state and local laws, including the City of Los Angeles’ Fair Chance Initiative for Hiring.*