Chip/Software Engineer
Role summary
Seeking a highly experienced VLSI front-end design engineer with strong coding skills to contribute to building and scaling chip AI models and agent-driven workflows. The role involves writing production-level Python/C++ code, making key software architectural decisions, translating user feedback into product features, and planning the product roadmap. The ideal candidate is passionate about AI in EDA, experienced with ASIC design flows using SystemVerilog and common EDA tools, and capable of shipping high-quality code rapidly. Preferred qualifications include experience with tapeouts, open-source EDA contributions, and PPA optimization or functional correctness convergence.
We’re looking for a key engineer with significant experience with the VLSI front-end design flow and strong coding skills to help us build/scale chip AI models and agent-driven workflows.
Who You Are
You are excited about transforming the way chips are built by the entire chip industry.
You are resourceful, a self-starter, and care intensely about the quality of your work.
You want to work at a scrappy startup that sets and meets aggressive goals.
You want to own/drive core product and write/ship code every day.
You want to work with our customers/users and translate their feedback into company/product direction.
If this sounds like you, please apply to join the team!
What You’ll Do
- Write code (Python/C++) that ships to Fortune 500s and chip unicorns
- Make software architectural decisions for key product features
- Translate user feedback into product updates/features
- Plan core product roadmap and strategy
Minimum Requirements
- Passionate and excited about chips and AI for EDA
- Experienced with designing ASICs using SystemVerilog and synthesis/verification tools (open-source and/or commercial)
- Experienced with common front-end EDA tools
- Good at writing/shipping high-quality code (Python/C++) quickly
- Basic knowledge of statistics & AI/ML methods
- Resilient, data-driven, and works from first principles
Ideal Requirements
- 1+ tapeouts (ideally on advanced technology nodes)
- Contributor to open-source EDA/chip efforts
- Significant experience with PPA optimization and/or functional correctness convergence
Benefits
- Generous salary and equity package
- Full health/vision/dental/401k benefits
- Team meals
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Apply to chat with the founders about the details!