Apple logo
Apple Verified
Consumer Electronics, Software, Services, Retail

SoC Physical Design Engineer, PnR

Waltham, Massachusetts, United StatesOnsiteFull TimePosted 22 hours agoVisa sponsorship available

Is this role right for you?

Upload your resume and get a skill-by-skill breakdown — see exactly where you match, where you're close, and what to highlight. Not a mystery percentage.

Get a tailored resume highlighting what this role needs.

Role summary

Apple is seeking a SoC Physical Design Engineer specializing in Place and Route (PnR) to be responsible for the physical implementation of highly complex SoC designs from netlist to tapeout. This role involves working closely with logic design teams, completing PnR implementation, performing timing, physical, and electrical verification, and driving signoff closure. The engineer will also resolve design and flow issues and optimize PnR partitions for best Power/Performance/Area. The position requires a minimum of BS and 3+ years of relevant industry experience, with a preference for candidates with recent successful deep submicron technology tapeouts and strong knowledge of PD flows and methodologies.

Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hardworking people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple product! In this visible role, you will be directly responsible for the physical implementation of design partition(s) (from netlist to tapeout) for a highly complex SoC utilizing innovative process technology.

Description


• Work with the logic design team to understand partition architecture and drive physical aspects early in the design cycle. • Complete netlist to GDS2 implementation for partition(s) meeting schedule and design goals. • Timing, physical and electrical verification, and driving the signoff closure for the partitions. • Resolve and improve design and flow issues related to physical design, identify potential solutions, and drive execution. • Drive optimization of PnR partitions, to achieve best Power/Performance/Area.

Minimum Qualifications


Minimum BS and 3+ years of relevant industry experience.

Preferred Qualifications


Recent successful tapeouts in deep submicron technology. Knowledgeable in partition level P&R implementation including floorplanning, clock & power distribution, timing closure, and physical & electrical verification. Strong knowledge of PD construction & analysis flows and methodology. Shown ability to execute to stringent schedule & die size requirements. Strong interpersonal skills. Experienced in industry standard tools and understanding their capabilities and underlying algorithms.

Sample Apple interview questions

  • 1

    Design a typeahead box for a search engine

    system designmedium
  • 2

    Design a rate limiter

    system designmedium
  • 3

    Architect a key-value store for distributed systems.

    system designmedium
  • 4

    Design a system to schedule jobs in a distributed environment

    system designmedium
  • 5

    What is an API and how does it work?

    technicalmedium

Get started to unlock a personalized interview prep pack for this role.

Ready to apply?
You'll be redirected to Apple's application page.

Similar roles

See how RiseMe works

Match, tailor, and prep — so you send fewer applications and land more interviews.