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MLA Design Verification Engineer I, Annapurna Labs

Austin, TXOnsiteFull TimeEntry-level (exp-based)$116,100–$116,100 /yrPosted 1 month agoVisa sponsorship available

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Required skills

  • System Verilog
  • UVM
  • testbench development
  • stimulus
  • checkers
  • assertions
  • coverage

Nice to have

  • C/C++
  • Object-Oriented Programming
  • IP blocks
  • SoCs
  • system testing

Role summary

Annapurna Labs is seeking an MLA Design Verification Engineer I to join their Cloud-Scale Machine Learning Acceleration team. This role involves verifying and validating hardware and software solutions, developing verification plans, and measuring progress towards customer metrics. The ideal candidate will have 1+ years of experience in design verification using System Verilog and UVM, and testbench development. Experience with C/C++, Object-Oriented Programming, and multi-level logic verification (IP blocks to SoCs to full system testing) is preferred. This is an onsite role in Austin, TX.

At Annapurna Labs we are at the forefront of hardware co-design not just in Amazon Web Services (AWS) but across the industry. The work we do is cutting-edge and internet-scale while also being deeply important to our customers. We design and build every component of our hardware and software to come together into products that our customers use for accelerated computing: either Machine Learning acceleration, or FPGA acceleration.

As a member of the Cloud-Scale Machine Learning Acceleration team, you will be responsible for the design and optimization of hardware in our data centers including technologies such as AWS Inferentia, which is a machine learning inference product designed to deliver high performance at low cost.

If you are interested in "building a complete product" from inception to delighted customers, Annapurna is a fantastic choice.

If this sounds exciting to you - come build the future with us!

Key job responsibilities
Some of your responsibilities will include verifying/validating that our hardware and software solutions achieve their desired functionality, developing and executing multi-faceted verification/validation plans, and measuring the teams progress towards our ambitious customer metrics.

A day in the life
0 Basic Qualifications: - Currently has, or is in the process of obtaining, a Bachelor's degree or above in Electrical Engineering, Computer Engineering, or related fields
- 1+ years of design verification experience using System Verilog and UVM
- 1+ years of experience in testbench development including stimulus, checkers, assertions and coverage Preferred Qualifications: - Experience with C/C++ and Object-Oriented Programming
- Experience verifying at multiple levels of logic from IP blocks to SoCs to full system testing

Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.

Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner.

The starting pay for this position is listed below. Starting Day 1 of employment, Amazon offers EAP, Mental Health Support, Medical Advice Line, 401(k) matching. Learn more about our benefits at https://hiring.amazon.com/why-amazon/benefits. 



Austin, TX, USA - 116,100.00 USD Annually

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