Power Engineer

Name: RiseMe
Availability: InStock

Austin, TXOnsiteFull TimePosted 1 month agoVisa sponsorship available

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Required skills

Synopsys PTPX
PrimePower RTL
PowerArtist
Verilog
Python
Perl
Synthesis flows
clock constraints
physical design
silicon characterization

Role summary

Apple is seeking a Power Engineer in Austin, Texas, to work with architects and design teams on simulating and modeling SOC and IP power for future projects. Responsibilities include analyzing power data using tools like Synopsys PTPX, PrimePower RTL, and PowerArtist to identify optimization opportunities. The role involves writing Verilog for test benches, analyzing frequency and voltage combinations, and scripting in Python/Perl to enhance power modeling flows and data analysis. Collaboration with multi-functional teams is key to understanding system-level impacts on power. A Master's degree in Electrical or Computer Engineering is required, along with experience in synthesis flows, clock constraints, physical design, and silicon characterization.

Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.

Description

APPLE INC has the following available in Austin, Texas. Work with architects to resolve interesting use-cases to simulate. Provide power projection for the future projects based on analysis. Create test cases within the design verification team’s environment. Work with logic teams to determine the correct functionality or enhance functionality for power reduction. Work with Architecture and design team to model the SOC power for use cases. Develop IP power model on new architecture design, providing power data for performance/power/area trade-offs. Work with multi-functional teams on improving power modeling; and understand interactions of the product at the software and system level that impact power. 40 hours/week.

Minimum Qualifications

Master’s degree or foreign equivalent in Electrical Engineering, Computer Engineering or related field. Education/experience with each of the following skills is required: Running and analyzing Synopsys PTPX power data, both leakage and dynamic at multiple temperatures Using PrimePower RTL or PowerArtist and how to identify opportunities for improving power in design Writing Verilog and developing test bench code for generating new power coverage vectors Analyzing different frequency and voltage combinations that would help achieve optimal power. Writing Python/Perl for enhancing power modeling flows or data analysis Working with synthesis flows, clock constraints, and physical design Understanding silicon characterization and how to account for part distributions for modeling accuracy Improving power modeling by understanding front-end simulations, use-case definitions, and real system behaviors

Preferred Qualifications

N/A

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