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Consumer Electronics, Software, Services, Retail

Packaging Engineer

CaliforniaOnsiteFull TimePosted 2 months agoVisa sponsorship available

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Required skills

  • Packaging Engineer
  • Custom Silicon packaging
  • consumer markets
  • product/device design
  • quality
  • supply chain
  • external suppliers
  • new packaging technologies
  • negotiator
  • influencer

Nice to have

  • M.S
  • mechanical engineering
  • physics
  • materials science
  • AutoCAD
  • APD

Role summary

Seeking a senior-level Individual Contributor Packaging Engineer to develop innovative Custom Silicon packaging solutions for consumer markets. This role involves interfacing with internal teams and external suppliers to deploy new packaging technologies, reduce development cycles, and qualify devices for high-volume manufacturing. The ideal candidate will have a strong background in IC packaging, qualification, reliability testing, and process development, with expertise in areas like WLP, Wafer Bumping, and assembly processes. Experience with simulation tools and materials science is preferred.

Looking for a senior level IC packaging engineer to develop exciting new products. You will be responsible providing Custom Silicon packaging solutions in a module/system for various consumer markets.

Description


• In this fast-paced environment, your role is to interface between internal product/device design, quality, supply chain, and the external suppliers to develop and deploy new packaging technologies. • Must be a good negotiator and influencer to drive industry to meet company needs. • We are looking for individuals who are very innovative with a proven track record to reduce package development cycle and qualify devices into a high-volume manufacturing environment.

Minimum Qualifications


BS and 10+ years of relevant industry experience.

Preferred Qualifications


M.S or Ph.D. degree in mechanical engineering, physics, materials science or similar disciplines with a minimum of 10 years of experience in IC packaging. AutoCAD, APD and multi-physics simulation knowledge is a plus. Industry experience and work on WLP either in IDM or Fabless companies. Knowledge and hands-on experience on Wafer Bumping and Dielectric materials and their pros/cons is a must. Some hands-on knowledge in Manufacturing assembly processes; such as wafer back-grind, wafer dicing, Flip Chip die attach, encapsulation/molding, under-fill, ball attach, package singulation and Tape & Reel. In-depth knowledge in Wafer Level Chip Scale Packaging (RDL/Wafer Bumping & BEOL Assembly processes for Fan-In & Fan-Out designs). Good knowledge on Package Qualification and Reliability testing. Expert level knowledge of common reliability failure modes. Able to understand device physics and component/board level reliability testing. Proven track record to bring a product/package from conceptual stage to development and to HVM environment. Ability to construct Designs of Experiments and down-select materials and processes. Good written and verbal communication skills. Able to present ideas, design concepts, data and plan with high confidence at team meetings and executive review meetings. Able to perform independent research and development work with minimal supervision.

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