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Consumer Electronics, Software, Services, Retail

Digital Circuit Design Engineer

Cupertino, CAOnsiteFull Time$148,987–$218,000 /yrPosted 1 month agoVisa sponsorship available

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Required skills

  • VLSI
  • SRAM
  • Hspice
  • Verilog
  • Static Timing Analysis
  • PnR
  • PVT
  • analog design
  • low power circuits
  • high performance circuits

Role summary

Apple is seeking a Digital Circuit Design Engineer in Cupertino, California, to develop custom circuits for improved chip power efficiency. This role involves defining specifications, performing design, analysis, modeling, simulation, and verification across PVT and statistical design. The engineer will collaborate with layout teams, drive circuit methodology, and ensure high design quality. The position requires a Master's degree in Electrical Engineering or a related field with 2 years of experience in designing high-performance and ultra-low power circuits using VLSI, SRAM compiler design, Hspice simulation, Verilog, and static timing analysis/PnR.

Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.

Description


APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Collaborate with all fields, with a critical impact and play a strategic role of getting functional products to millions of customers quickly. Integrate and come up with new ideas, as well as work with a team of hardworking engineers. Develop custom circuits to improve chip power efficiency. Work with power team, PD and architects to define specifications and requirements. Perform design, analysis, modeling/simulation, circuit level specifications, schematic capture, spice simulation/margin verification across PVT, statistical design, functional verification and silicon bring up. Work closely with layout team to complete the design and oversee the layout quality. Develop and drive circuit methodology to achieve the highest design quality metrics. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $148,987 - $218,000/yr and your base pay will depend on your skills, qualifications, experience, and location. PAY & BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: https://www.apple.com/careers/us/benefits.html. Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

Minimum Qualifications


Master’s degree or foreign equivalent in Electrical Engineering, Electronics Engineering, or a related field and 2 years of experience in the job offered or related occupation. Experience and/or education must include: Designing high performance circuits. Designing ultra-low power circuits utilizing analog design. Conducting transistor level circuit design with utilizing VLSI design. SRAM compiler design to design SRAM macros with aggressive PPA (power performance area) targets for different applications. Using Hspice simulation to analyze design margins across voltages and temperature. Using Verilog to code and verify behavioral model for circuits. Using static timing analysis and PnR (Place and Route) to work closely with physical design team for circuit integration.

Preferred Qualifications


N/A

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