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Consumer Electronics, Software, Services, Retail

CPU Power Engineer

Beaverton, OROnsiteFull TimePosted 2 months agoVisa sponsorship available

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Required skills

  • CPU Power Engineer
  • power budgeting
  • power analysis
  • recovery opportunities
  • micro-architecture
  • RTL
  • physical design
  • high performance designs
  • power rollups
  • net lists

Nice to have

  • STA
  • spice
  • device physics

Role summary

Apple is seeking a CPU Power Engineer to join their CPU team. This role focuses on power budgeting, analysis, and identifying recovery opportunities at the intersection of micro-architecture, RTL, physical design, and technology for high-performance designs. Responsibilities include analyzing power impact of new features, generating power rollups, and creating power projections. Requires BS degree and scripting experience in Perl, Python, or TCL. Preferred qualifications include broad knowledge of micro-architecture, physical implementation, auto place and route tools, STA, SPICE, logic design, device physics, CMOS circuit design, and CPU architecture.

Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products! The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver groundbreaking Apple products! We are looking for a strong candidate to join our CPU team focusing on power budgeting, analysis, and identification of recovery opportunities at the cross-section of micro-architecture, RTL, physical design, and technology in high performance designs.

Description


As a CPU Power Engineer, you will have the following responsibilities: • Analyze and estimate the power impact of implementing new micro-architectural features • Generate power rollups and projected estimates from initial to mature net lists through the lifecycle of a project • Analyze power contributions to generate opportunities for recovery in physical implementation as well as RTL • Create power projections factoring in expected cost of convergence and implementation and refine the process

Minimum Qualifications


Minimum BS required Scripting experience in Perl/Python and TCL

Preferred Qualifications


The ideal candidate should have broad knowledge related to micro-architecture, physical implementation, auto place and route tools, STA, spice, logic design, and device physics Knowledge of logic design principles along with timing and power implications for high performance and high frequency designs CMOS circuit design and analysis skills Experience with industry-standard power analysis tools like PrimePower and PowerArtist Academic or industry experience with CPU architecture and implementation

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