
Design Verification
Required skills
- low power verification
- SOC
- Power Manager
- test plan
- coverage plans
- test benches
- hardware
- power state transitions
- directed tests
- random tests
Role summary
Apple is seeking a Design Verification engineer in Cupertino, California, to focus on low power verification of various Apple SOCs. Responsibilities include reviewing design specifications, developing test plans and benches, creating directed and random tests in C, System Verilog, Perl, and Python, and verifying integration using protocols like AXI and AMBA. The role requires 2 years of experience in hardware verification, low power design fundamentals, and proficiency in relevant programming and modeling languages. The position involves running chip-level simulations, debugging failures, and managing deliverables.
Description
APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Responsible for low power verification of various Apple SOC. Review power related aspects of design and architecture specifications of SOCs and corresponding Power Manager SOCs and work closely with design, architecture, software teams to identify attributes that need to be tested. Develop test plan and coverage plans and develop, define test benches needed for executing on the test plan. Develop specific test plans to verify low power functionality of various system on chip designs. Develop specific test plans to verify hardware within system on chip responsible for restoring hardware to correct state as chip goes through power state transitions. Create directed and random tests for testing the integration of power manager. Write tests in C programming language for testing the hardware. Create system Verilog behavioral models and stimulus to test the simulation of system on chip with power manager chip together. Write scripts in Perl and Python programming languages to automate the verification of test plan. Create scripts and regressions to track and maintain chip simulations. Run chip level simulations using CAD software. Use AXI,AMBA Protocols to verify integration of various blocks within chip and debug failing test cases. File bug reports for simulation failures and track them until fix and closure. Work independently and manage deliverables to align with project goals and support cross functional engineering efforts. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $150,400 - $225,300/yr and your base pay will depend on your skills, qualifications, experience, and location. PAY & BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: https://www.apple.com/careers/us/benefits.html. Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Minimum Qualifications
Bachelor’s Degree or foreign equivalent in Computer Science, Computer Engineering or related field and 2 years of experience in the job offered or related occupation. 2 years of experience with each of the following skills is required: Using digital and logic design concepts to understand the process of hardware design and verification Utilizing ARM/X86 based Computer architecture to drive processor-based verification stimulus Using data structures and algorithms to write efficient C based stimulus for chip level verification Utilizing System Verilog to create stimulus and behavioral models to validate chip design systems Using C to write chip level test cases that drive stimulus Utilizing Perl or Python to automate tasks like running testcases, failure triaging and regression maintenance. Utilizing low power design fundamentals specific to CMOS based designs. Using languages including UPF to describe power intent for hardware designs
Preferred Qualifications
N/A
Sample Apple interview questions
- 1
Design a typeahead box for a search engine
system designmedium - 2
Design a rate limiter
system designmedium - 3
Architect a key-value store for distributed systems.
system designmedium - 4
Design a system to schedule jobs in a distributed environment
system designmedium - 5
What is an API and how does it work?
technicalmedium
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