Design Verification Engineer

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Description

APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Understand details of High-Efficiency SOC Architecture, standard SOC peripherals such as SPI, I2C, UART, Timer, DMA, memory management schemes, low power spec, multi-processor systems, DDR, PCIe, DDR, Memory Controller Sub Systems, USB, PLL, power-up, Secured Boot schemes. Create coverage driven verification plans from specifications, review and refine to achieve coverage targets. Create IP level module and sub-system verification plan, TB, portable test benches, sequences, and test infrastructure. Architect highly reusable test benches and integrate complex multi-instance VIPs, sub-system test benches, and test suites to SOC level, achieve targeted coverage, working with design, architecture, SW, FW, and external IP delivery teams to efficiently integrate and verify overall SOC design. Work closely with DV methodology architects to improve verification flow. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $150,400 - $225,300/yr and your base pay will depend on your skills, qualifications, experience, and location. PAY & BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: https://www.apple.com/careers/us/benefits.html. Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

Minimum Qualifications

Master’s degree or foreign equivalent in Electrical and Computer Engineering, Electrical Engineering, Electronics Engineering, Computer Science, or a related field. Experience and/or education must include: Using hardware description languages like Verilog to develop testbenches, reference models, understand, verify and debug digital designs. Implementing programming languages like C/C++, object-oriented programming to work with system models, design reference models, stimulus drivers that need object-oriented concepts. Using combinational and sequential circuits designs to understand, verify and debug digital designs. Understanding of Microprocessors architecture, processor organization, instruction set architecture to work on microprocessor design verification, integration and debug. Understanding advanced computer architecture concepts to work on CPU integration and verification. Knowledge of Microelectronics and semiconductor physics to work on digital and mixed-signal models, integration, debug. Understanding of computer networking, design of communication protocols and wireless networks to work on design of reference models and verification of wireless chips. Understanding of parallel computing to work on multi-threaded design, stimulus generation and using mutex, semaphore and parallel computing concepts. Using Unix/Linux operating system to execute on all job functions including file management, system monitoring, automation through scripting. Using scripting languages such as Python to work on system testbenches and automate verification flows.

Preferred Qualifications

N/A