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Consumer Electronics, Software, Services, Retail

Power Integrity Engineer

San Diego, CAOnsiteFull TimePosted 2 months agoVisa sponsorship available

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Required skills

  • SoC
  • Power Integrity
  • PDN
  • droop budget
  • PMU
  • PCB
  • Module
  • PKG
  • Die
  • VR

Nice to have

  • Power Electronics
  • Electromagnetics
  • Microwave
  • Analog/RF Circuit Design
  • voltage regulator technologies
  • low-power design

Role summary

We are seeking a dedicated and passionate SoC Power Integrity Engineer to join our Hardware Technology Group. This role involves developing, implementing, and verifying Power Integrity solutions for compute and connectivity SoCs in Apple devices. You will collaborate with cross-functional teams to define SoC power delivery architecture, set droop budgets, design end-to-end PDN solutions, and validate power integrity performance using advanced lab measurements. The ideal candidate has a BS and 10+ years of relevant industry experience, with a strong understanding of power delivery systems and modeling.

Do you like to work on groundbreaking technologies that enable amazing new products? Do you have the attention for details and love for precision to work towards an outstanding result? We are looking for a dedicated and passionate SoC Power Integrity Engineer to join our team in Hardware Technology Group. In this role, you will be responsible for the development, implementation, and verification of Power Integrity solutions for compute and connectivity SoCs used in Apple devices (iPhone/iPad/Wearable/Mac/Home/Vision etc.). You will work with cross-functional teams to drive SoC power delivery architecture, define off-die droop budgets, design and implement power delivery network (PDN) solutions end-to-end PMU/PCB/Module/PKG/Die, and verify the quality of the power integrity performance and efficiency using advanced lab measurements.

Description


• Definition of the PDN architecture and design solution space for systems across a wide range of power and noise specifications. • Power delivery modeling, simulation, and characterization for die, package, module, board, and Voltage Regulator (VR) • Definition of the PDN architecture and design solution space for the target system • Broad responsibility on all SoC PI related topics, including on-die inrush, off-die droop budget, PDN signoffs, digital to analog/RF noise coupling analysis, voltage guard band, active droop mitigation etc.

Minimum Qualifications


BS and 10 +years of relevant industry experience

Preferred Qualifications


M.S. or Ph.D. with academic background in Power/Signal Integrity, Power Electronics, Electromagnetics, Microwave, and/or Analog/RF Circuit Design. Understanding of power supply architecture covering multi-stage voltage regulator technologies, PCB and package design trends and trade-offs, and chip supply design including low-power and high-power design methodologies. Experience in PI/SI methodology development, PDN modeling from system to die, and lab correlation/validation in time-/frequency-domain. Proficiency in Python coding, AI/ML assisted automation experience. Experience in design and analysis of product power supply solution. Deep understanding of Voltage Regulator design principles and electrical performance in the system environment. Good knowledge in 3D/2D EM simulation tools, electromagnetic and transmission line theory. Preferably working knowledge on analog/RF/wireless noise coupling and sensitivity Familiar with lab equipment including but not limited to VNA, real-time scope, spectrum analyzer. Ability to work and communicate efficiently in cross-functional teams.

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