Principal Digital Design Engineer
Required skills
- Principal Digital Design Engineer
- micro-architecture
- implementation
- front-end circuit design
- RTL
- synthesis
- IP integration
- block-level verification
- high performance network controllers
- electrical engineering
Nice to have
- Firmware development
- C-language
- scripting
- Python
- PCIe Switch products
- Ethernet Switch products
Role summary
Seeking a Principal Digital Design Engineer with expertise in micro-architecture and front-end circuit design for high-performance network controllers. Responsibilities include RTL development, synthesis, IP integration, and block-level verification. Requires a strong background in electrical engineering, a Bachelor's degree, and 8+ years of experience with SoC/silicon products for networking, server, or storage applications. Must have hands-on knowledge of high-speed protocols like PCIe, Ualink, Esun, and Ethernet, along with proven front-end design skills from architecture to GDS. Familiarity with digital design tools, DFT, silicon bring-up, and small-geometry CMOS is essential. Preferred experience includes firmware development and scripting.
Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.
Job Description
We are looking for Principal Digital Design Engineers with experience developing micro-architecture and implementation of the front-end circuit design, including RTL, synthesis, IP integration, and block-level verification for high performance network controllers. The candidate must have good knowledge of communication/interface protocols such as PCI-Express (Gen-3 and above), Ualink, Esun, Ethernet etc.
Basic Qualifications:
Required Experience:
Preferred Experience:
The base salary range is $185,000.00 USD – $230,000.00 USD. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.
We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.
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