
RTL IC Design Engineer
Required skills
- RTL
- Verilog
- SystemVerilog
- Micro-architecture
- RTL optimization
- RTL debugging
- timing closure
- Electrical Engineering
- Electronics Engineering
- Computer Engineering
Nice to have
- PCIe protocol
- CXL protocol
- AMBA protocols
- RAID Storage designs
- PCIe Switch designs
- asynchronous clock domain crossings
Role summary
Broadcom is seeking a Digital IC Design Engineer for their Data Center Solutions Group to work on PCIe Switch and Enterprise Storage Products. The role involves in-depth knowledge of RTL design using Verilog/SystemVerilog, micro-architecture development, and timing closure. Responsibilities include RTL implementation, debugging, and collaborating with cross-functional teams. Experience with PCIe, CXL, AMBA protocols, and storage designs is desired. A Bachelor's degree in a relevant engineering field and 5+ years of industry experience are required. This is an onsite position.
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Job Description:
Broadcom is searching for a Digital IC Design Engineer to join the Data Center Solutions Group. This position involves working with the latest technology to continue driving next generation AI/ML ecosystems through our PCIe Switch Products – and managing mega datacenters, while leading world class performance, through our Enterprise Storage Products. More specifically, this position will require in-depth knowledge surrounding all aspects of implementation and supporting RTL designs using Verilog/SystemVerilog.
Responsibilities include, but are not limited to the following:
High-level architecture specification analysis – interactive authoring and review.
Micro-architecture development and documentation.
High-quality, high-performance Verilog/SystemVerilog RTL implementation based on a design specification – may also include areas such as asynchronous clock domain crossings, multiple power domains, low-power design, complex algorithms, deep computations and pipelining, multi-threaded designs, and integrating third-party IP.
Converging the design to timing closure by RTL optimization strategies.
Superb RTL debugging skills with well thought out robust RTL solutions.
Working with cross functional teams such as Verification Engineering, Software/Firmware Engineering, Emulation Engineering, and Validation Engineering to support any issues that may arise on the RTL design.
Lab support for silicon as it progresses through validation.
Must work in person: no remote work allowed.
Desired attributes, but not required:
PCIe protocol
CXL protocol
AMBA protocols
RAID Storage designs
PCIe Switch designs
Education and Experience Requirements:
Minimum: Bachelor’s degree required in Electrical Engineering, Electronics Engineering, Computer Science, Computer Engineering, or equivalent Engineering degree.
5+ years of relevant industry experience
Compensation and Benefits
The annual base salary range for this position is To
As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.
If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.
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