Semiconductor, Electronic Design Automation (EDA), Software Development

Lead C++ Software Engineer - Palladium Emulation Platform

San Jose 11, CAOnsiteFull TimeLead$119,000–$221,000 /yrPosted 5 days agoVisa sponsorship available

Is this role right for you?

Upload your resume and get a skill-by-skill breakdown — see exactly where you match, where you're close, and what to highlight. Not a mystery percentage.

Get a tailored resume highlighting what this role needs.

Required skills

C++
data structures
algorithms
databases
gdb debugging
Linux/Unix development
Verilog
SystemVerilog
VHDL
electronic design platforms

Nice to have

version-control systems
multi-threading
distributed computing
logic optimization
partitioning
scheduling

Role summary

Cadence is seeking a Lead C++ Software Engineer for their Palladium Emulation Platform team in San Jose, CA. This role involves contributing to the world's fastest emulator compiler development, applying skills in multi-threading and distributed computing to solve large-scale compile problems like logic optimization, partitioning, and scheduling. The position requires strong proficiency in C++, data structures, algorithms, and databases, with familiarity in Linux/Unix development. Experience with gdb debugging, build/version control systems, Hardware Description Languages (Verilog, SystemVerilog, VHDL), and electronic design platforms is also valued.

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

The Cadence Palladium Platform is world most scalable emulation system that verifies most of the latest design innovations in electronics worldwide. We are looking for a talented engineer to join our team and contribute to the world’s fastest emulator compiler development. You’ll have a great opportunity to make a difference by applying your creativity and problem-solving skills, learn and/or apply multi-threading/distributed computing to solve large scale compile problems such logic optimization, partitioning and scheduling.

The job is located in the heart of Silicon Valley, San Jose, CA.

Strong understanding of software data structure and algorithms and proficiency in C/C++ are basic job requirements.

Requirements

MS. With 2 year experience or Ph.D in engineering, computer science or related field.
Strong understanding of data structures, algorithms and databases.
Demonstrated proficiency in C++, gdb debugging, and general software development skills
Familiarity with Linux/Unix development.
Exposure to build and version-control systems.
Coursework in Hardware Descript Language, such as Verilog, SystemVerilog, VHDL.
Exposure to electronic design platforms.

The annual salary range for California is $119,000 to $221,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

We’re doing work that matters. Help us solve what others can’t.

Ready to apply?

You'll be redirected to Cadence's application page.