Aerospace, Defense, Deep Tech, Hardware

HWIL FPGA Engineer

Allen, TXOnsiteFull TimePosted 2 months ago

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Required skills

FPGA
HWIL
VHDL
Verilog
SystemVerilog
Xilinx/AMD FPGA platforms
RTL
6-DOF models
radar hardware
sensors

Nice to have

PIL
real-time simulation environments
RF
avionics
guidance
navigation

Role summary

Castelion is seeking an experienced HWIL FPGA Engineer to lead the architecture, development, integration, and verification of FPGA solutions for their next-generation Hardware-in-the-Loop (HWIL) test capability. This role involves developing real-time test environments that bridge high-fidelity simulations with physical hardware for closed-loop testing. The engineer will collaborate across multidisciplinary teams, including simulation, hardware, electrical, mechanical, and software engineers, to build and iterate on HWIL systems. Key responsibilities include designing FPGA interfaces, implementing high-performance solutions using high-level synthesis, and supporting hardware bring-up and debugging in laboratory settings. A Bachelor's degree in a related technical field and 5+ years of FPGA development experience are required.

Why Castelion, Why Now

Castelion is moving incredibly fast to develop and deliver advanced defense systems at a time when execution matters more than ever. We believe focus, ownership, and excellence are decisive advantages - and we're building a world-class team to turn bold ideas into real capability.

This is a rare opportunity to join at an early stage, where you'll have significant ownership, collaborate with exceptional teammates, and make a direct, measurable impact on our mission and the future of the company - regardless of your function.

HWIL FPGA Engineer

As a HWIL FPGA Engineer, you will lead the FPGA architecture and development for Castelion's next-generation Hardware-in-the-Loop (HWIL) test capability. You will be a foundational member of a multidisciplinary team responsible for building a real-time test environment that enables rapid validation of hardware and algorithms before flight testing.

Working alongside simulation, hardware, electrical, mechanical, software, and guidance engineers, you'll develop FPGA-based solutions that bridge high-fidelity 6-DOF simulation with physical hardware, ultimately enabling fully closed-loop testing in representative mission environments.

This role is ideal for engineers who enjoy solving difficult real-time hardware challenges, working across multiple engineering disciplines, and building systems from the ground up.

Responsibilities

Lead FPGA architecture, development, integration, and verification for Castelion's Hardware-in-the-Loop (HWIL) test system.

Develop FPGA solutions supporting real-time evaluation and closed-loop hardware testing.

Collaborate with simulation engineers to integrate high-fidelity 6-DOF models into FPGA-based HWIL architectures.

Design FPGA interfaces that integrate seamlessly with radar hardware, sensors, and supporting electronics.

Develop high-performance FPGA implementations using high-level synthesis tools while optimizing generated RTL where appropriate.

Participate in system architecture definition, interface development, and hardware design reviews.

Develop FPGA verification strategies including simulation, timing analysis, hardware validation, and laboratory integration.

Support bring-up, debugging, and optimization of FPGA hardware in laboratory environments.

Partner closely with electrical, mechanical, software, and systems engineers to rapidly iterate HWIL capabilities using a crawl, walk, run development methodology.

Contribute to the evolution of the HWIL system from early open-loop demonstrations to fully closed-loop representative mission testing.

Basic Qualifications

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline.

5+ years of professional FPGA development experience.

Experience developing FPGA solutions using VHDL, Verilog, or SystemVerilog.

Experience with Xilinx/AMD FPGA platforms and associated development toolchains.

U.S. Citizenship required.

Preferred Skills and Experience

Ability to generate RTL from HLS workflows while understanding and optimizing the resulting hardware implementation.

Strong understanding of FPGA development workflows including simulation, synthesis, implementation, timing closure, and hardware debugging.

Experience integrating FPGA designs with complex hardware interfaces and embedded systems.

Familiarity with hardware-in-the-loop (HWIL), processor-in-the-loop (PIL), or real-time simulation environments.

Experience supporting radar, RF, avionics, guidance, navigation, control, or aerospace systems.

Experience working with high-speed interfaces, real-time data processing, and deterministic hardware architectures.

Familiarity with laboratory integration, oscilloscopes, logic analyzers, and hardware debugging tools.

Ability to collaborate effectively across multidisciplinary engineering teams in a fast-paced development environment.

Active U.S. security clearance or the ability to obtain one is highly desired.

Castelion offers a generous benefits package. Please refer to the bottom of our Careers page for more details.

Other Duties

Please note this job description is not designed to cover or contain a comprehensive listing of activities, duties or responsibilities that are required of the employee for this job. Duties, responsibilities and activities may change at any time with or without notice.

Additional Eligibility Requirements

This position may require access to classified information or restricted U.S. Government sites, systems, or information, as determined by the Company and/or applicable U.S. Government requirements. If the position is so designated, your employment in the role may be contingent upon your ability to obtain and maintain the required U.S. Government security clearance or other government authorization, and to satisfy any citizenship or other eligibility requirements imposed by applicable law, regulation, executive order, or government contract requirements. You will be notified if and when such requirements apply.

Affirmative Action/EEO Statement

Castelion is an Equal Opportunity Employer. We are committed to providing equal employment opportunities to all applicants and employees without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability, genetic information, protected veteran status, or any other characteristic protected by applicable federal, state, or local law.

Castelion is committed to providing reasonable accommodations to qualified individuals with disabilities throughout the application and hiring process. If you require a reasonable accommodation to complete an application, participate in the interview process, or otherwise participate in the hiring process, please contact hr@castelion.com. Requests for accommodation will be considered on an individual basis and handled in accordance with applicable law.

Castelion is committed to fostering a workplace where employment decisions are based on qualifications, business needs, and the ability to perform the essential functions of the role, with or without reasonable accommodation.

EAR/ITAR Requirements

This position requires access to export-controlled information, and as such, employment (or hiring of a contractor) is contingent upon the candidate’s ability to access all applicable export-controlled information without additional export licensing being required by the Bureau of Industry and Security and/or the Directorate of Defense Trade Controls.

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HWIL FPGA Engineer

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Required skills

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