
Silicon Performance Architect, Reality Labs
Required skills
- SoC Performance
- Performance Modeling
- Correlation
- Workload Profiling
- Bottleneck Analysis
- C++
- SystemC
- SoC Architecture
- NoCs
- Memory Sub-system
Nice to have
- Cycle-accurate performance models
- Performance architecture evaluations
- Accelerators
- DRAM
- MMU
- Bare-metal programming
Role summary
Reality Labs is seeking a Silicon Performance Architect to drive the state-of-the-art in AI-enabled wearables. This role involves leading performance modeling, correlation, workload profiling, and analysis for custom silicon. Responsibilities include bottleneck analysis, developing SoC performance models, analyzing workload behavior, identifying optimizations, and collaborating on HW-SW co-design. The ideal candidate has 8+ years of experience in performance modeling with C/C++ or SystemC, experience with SoC architecture principles, Python for automation, and power concepts. Preferred qualifications include experience with cycle-accurate models, bare-metal programming, and AI tool integration.
Responsibilities
- Conduct thorough bottleneck analysis of existing and future SoCs to identify areas for improvement
- Develop accurate models of IP components, SoC fabric, and DRAM to predict performance and inform design decisions
- Analyze system usage behavior of workloads and create micro-benchmarks to evaluate performance
- Identify opportunities for optimization and collaborate with hardware teams to solidify HW-SW co-design
- Work across disciplines, collaborate with vendors, brainstorm ideas and solutions, develop new methodologies, and coordinate multiple initiatives
Minimum Qualifications
- Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
- 8+ years of experience in creating performance models using C/C++ or SystemC
- Experience with SoC architecture, NoCs, memory sub-system, Quality of Service (QoS), and heterogeneous compute principles
- Experience with scripting, infrastructure, automation, and visualization using Python
- Experience with power concepts and trade-offs
- Experience deconstructing technical problems, designing performance experiments, analyzing/visualizing data, and sharing detailed analysis in the form of documentation with peers and cross-functional partners
Preferred Qualifications
- MS degree in EE/CS or equivalent experience
- Experience working with cycle-accurate performance models and frameworks for performance architecture evaluations of various SoC components (Accelerators, NoC, DRAM, MMU, etc.)
- Experience with bare-metal programming, micro-benchmarking, performance instrumentation, Simpoints, etc
- Experience with RTL design verification
- Demonstrated ability to integrate AI tools to optimize/redesign workflows and drive measurable impact (e.g., efficiency gains, quality improvements)
$178,000/year to $250,000/year + bonus + equity + benefits
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