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Nokia Verified
Telecommunications, Computer Hardware, Computer Software

Staff High Speed Analog IC Design RD Engineer

Sunnyvale, CAHybridFull TimeStaff$105,000–$150,000 /yrPosted 1 month agoVisa sponsorship available

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Required skills

  • High-speed analog IC designs
  • SiGe BiCMOS
  • CMOS
  • transmission lines
  • high-frequency passive structures
  • device physics
  • analog circuits
  • RF wafer probing
  • lab equipment
  • 100Gbaud ICs

Nice to have

  • VerilogA
  • CAD scripting languages
  • Skill
  • Python
  • shell scripts

Role summary

Nokia's Optical Networks division is seeking a Senior/Staff High-Speed Analog IC Design R&D Engineer to develop innovative >100Gbaud ICs for future products. This role involves hands-on experience across all R&D phases, including product definition, circuit design, layout, verification, bring-up, DVT, qualification, and production ramp-up. The engineer will collaborate closely with verification, CAD, product, and test engineering teams, and will be responsible for evaluating high-speed analog ICs using RF wafer probing and lab equipment. Experience with SiGe BiCMOS or CMOS, transmission lines, device physics, and high-frequency structures is required. Familiarity with VerilogA and CAD scripting languages is a plus. The ideal candidate is a self-motivated team player with strong communication skills.

In an increasingly connected world, the pandemic has highlighted just how essential telecom networks are to keeping society running. The Network Infrastructure group is at the heart of a revolution to connectivity, pushing the boundaries to deliver more and faster network capacity to people worldwide through our ambition, innovation, and technical expertise​ Join Optical Networks division, where innovation meets scale in the AI-driven data center era. With the recent acquisition of Infinera, we’ve united two industry leaders to create an optical networking powerhouse—combining cutting-edge technology with proven leadership to redefine the future of connectivity.​Nokia is seeking a Senior/Staff High-Speed Analog IC Design R&D Engineer to create innovative products in a fast-paced and collaborative team environment. The engineer will be hands-on with all phases of R&D including product definition, circuit design, layout, verification, bring-up, DVT, qualification, test and production ramp-up. As a member of a vertically-integrated team, the engineer will be directly supporting system level customers and will be closely working with product, operations and reliability teams. The self-motivated engineer must be able to anticipate problems and devise effective solutions.

Responsibilities

  • Responsible for developing > 100Gbaud ICs for future generation products
  • In charge of many aspects of IC product development, such as design, layout, and bring-up.
  • Work closely with verification, CAD, product and test engineering teams to devise and conduct DVT plans and characterization.

Qualifications

  • Experience with High-speed analog IC designs with SiGe BiCMOS or CMOS
  • Knowledge of transmission lines and other high-frequency passive structures
  • A good understanding of device physics and impact on analog circuits and techniques to improve performance.
  • Experience with RF wafer probing, lab equipment and evaluation of high-speed analog ICs
  • Familiarity with VerilogA and CAD scripting languages (Skill, python, shell scripts) would be an asset.
  • Must be a team player with good verbal and written communication skills
Education Requirements 
  • BS 5+ years – MS/PhD preferred
  • MS 3+ years
  • PhD

Sample Nokia interview questions

  • 1

    Merge Overlapping Intervals Merge overlapping intervals in an array. Input: intervals = [[1,4],[4,5]] Output: [[1,5]] Explanation: The intervals touch exactly at the 4 mark, so they are successfully merged into a single continuous interval.

    codingmedium
  • 2

    Dot Product of Two Sparse Vectors Calculate the dot product of two sparse vectors. Input: nums1 = [0,1,0,0,2], nums2 = [0,0,0,0,5] Output: 10 Explanation: Multiplies the aligned non-zero values (2 * 5) and ignores all the zeros, yielding a dot product of 10.

    codingmedium
  • 3

    Vertical Order Traversal Perform a vertical order traversal of a binary tree. Input: root = [1,2,3,4,5,6,7] Output: [[4],[2],[1,5,6],[3],[7]] Explanation: Traverses the tree maintaining column indices, seamlessly grouping nodes that share the exact same vertical alignment.

    codingmedium
  • 4

    Continuous Subarrays Sum Equals K Find the total number of continuous subarrays whose sum equals K. Input: nums = [1,2,3], k = 3 Output: 2 Explanation: Both the contiguous subarray [1,2] and the single-element subarray [3] sum perfectly to the target of 3.

    codingmedium
  • 5

    Iterator over a Binary Search Tree Implement an iterator over a binary search tree. Input: root = [7,3,15,null,null,9,20], calls: next(), hasNext(), next() Output: 3, TRUE, 7 Explanation: The iterator yields the smallest value (3), confirms more nodes exist, then properly yields the next in-order value (7).

    codingmedium

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