Sr. IC Packaging Test Engineer, Silicon Technology (Starlink)
Required skills
- semiconductor packaging
- wafer test
- ATE
- digital
- high-speed
- RF
- mixed signal
- SERDES
- wafer sort
- wafer probe
Nice to have
- microelectronics packaging development
- advanced technical degree
Role summary
Starlink is seeking a Sr. IC Packaging Test Engineer to bring integrated circuit packaging and assembly in-house for development and manufacturing. This role involves working closely with test equipment manufacturers and chip/system designers to develop and release production test solutions for packaged components and wafers. The engineer will own electrical test equipment definition, bring-up, and ATE test program development, ensuring product conformance and implementing advanced testing solutions for next-generation products. The position requires a Bachelor's degree in an engineering discipline and 5+ years of programming experience, with a strong preference for 10+ years of industry experience in microelectronics packaging and semiconductor testing.
SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.
Sr. IC PACKAGING TEST ENGINEER, SILICON TECHNOLOGY (STARLINK)
Starlink believes in providing fast, reliable internet to those that need it most. We design, build, and launch the world's largest and most advanced satellite constellation that is capable of delivering high-speed internet to even the most remote locations. We also design, build, and ship the hardware that sits in the homes of our customers all around the world. And while our hardware and network are incredibly advanced, we keep the end-user experience impressively simple - our customers have internet within 10 minutes of unboxing.
In true SpaceX fashion, Starlink is taking the next step in vertical integration by bringing integrated circuit packaging and assembly in-house for development and manufacturing. We are looking for talented hands-on and dynamic test engineers with expertise in semiconductor packaging and wafer test. You will work closely with test equipment manufacturers and in-house chip & system designers to develop and release production test solutions. You will assume full ownership of packaged component and wafer test as we strive to make Starlink more affordable to those that need it most.
RESPONSIBILITIES:
BASIC QUALIFICATIONS:
PREFERRED SKILLS AND EXPERIENCE:
ADDITIONAL REQUIREMENTS:
ITAR REQUIREMENTS:
SpaceX is an Equal Opportunity Employer; employment with SpaceX is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.
Applicants wishing to view a copy of SpaceX’s Affirmative Action Plan for veterans and individuals with disabilities, or applicants requiring reasonable accommodation to the application/interview process should reach out to EEOCompliance@spacex.com.
Sample SpaceX interview questions
- 1
Build a distributed platform for storing and serving digital assets.
system designmedium - 2
Design a system for real-time processing of IoT device data.
system designmedium - 3
Design a distributed message queue like Kafka.
system designmedium - 4
Develop a web app that shortens URLs like TinyURL.
system designmedium - 5
Propose a high-level design for a tracing system that can handle millions of spans per second across thousands of services.
system designmedium
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