Post-Silicon Validation Engineer
Required skills
- post-silicon validation
- bring-up
- SoCs
- IP
- validation content
- test plans
- automated test infrastructure
- silicon failures
- logic
- timing
Nice to have
- silicon characterization
- yield
- pre-silicon verification
- AI-assisted design tools
Role summary
Voltai is seeking a Post-Silicon Validation Engineer to ensure the functionality of first silicon. This role involves planning and executing post-silicon bring-up and validation for SoCs and IPs, developing test infrastructure, and debugging silicon failures. The engineer will correlate results with pre-silicon data and collaborate with design teams. The position requires 5+ years of experience in post-silicon validation, hands-on lab experience with debug tools, strong Python and C/C++ skills for automation, and experience with high-speed interfaces. Experience with silicon characterization, yield, pre-silicon verification, and AI-assisted design tools are considered a plus.
About Voltai
Voltai is developing world models, and agents to learn, evaluate, plan, experiment, and interact with the physical world. We are starting out with understanding and building hardware; electronics systems and semiconductors where AI can design and create beyond human cognitive limits.
About the Team
Backed by Silicon Valley’s top investors, Stanford University, and CEOs/Presidents of Google, AMD, Broadcom, Marvell, etc. We are a team of previous Stanford professors, SAIL researchers, Olympiad medalists (IPhO, IOI, etc.), the inventors of IC3 and the Murphi verification system, CTOs of Synopsys & GlobalFoundries, Head of Sales & CRO of Cadence, former US Secretary of Defense, National Security Advisor, and Senior Foreign-Policy Advisor to four US presidents.
About this Role
You'll make sure first silicon works. You'll own bring-up and validation on real silicon programs with leading semiconductor companies while helping Voltai's AI learn from what happens after tapeout.
What You’ll Do
Plan and execute post-silicon bring-up and validation for SoCs and IP.
Develop validation content, test plans, and automated test infrastructure.
Debug silicon failures across logic, timing, power, and system interactions.
Correlate silicon results with pre-silicon simulation, emulation, and formal results.
Work with design, DFT, and product engineering teams to drive root cause and fixes.
Capture silicon learnings that feed back into Voltai's models and verification flows.
What We’re Looking For
5+ years of post-silicon validation or bring-up experience.
Hands-on lab experience with oscilloscopes, logic analyzers, JTAG, and debug tools.
Strong Python and C/C++ for test automation.
Experience with high-speed interfaces (PCIe, DDR, Ethernet, or similar).
Systematic debug skills across hardware and software.
Bonus Points
Experience with silicon characterization and yield.
Background in pre-silicon verification.
Interest in AI-assisted design tools.
Similar roles
- CAD & Flow Methodology EngineerVoltai · Palo Alto, CA
- Physical Verification & Signoff EngineerVoltai · Palo Alto, CA
Sr / Principal Validation EngineerBachem · Vista, CA · Onsite
Summer 2027 - Validation Engineering Internonsemi · Nampa, ID · Onsite- Associate Validation Engineer - Test AutomationSequel Med Tech · Manchester, NH · Hybrid
Principal Validation Engineer, CVRMGenentech · Holly Springs, NC · Onsite
