RTL2GDS AE Architect
Required skills
- PPA
- PPA methodologies
- PPA flows
- RTL2GDS
- digital implementation
- signoff
- advanced nodes
- 5nm
- Computer Engineering
- Electrical Engineering
Nice to have
- incentive compensation
- bonus
- equity
- OTE
Role summary
Cadence is seeking an expert Digital Implementation Field Applications Engineer (AE) Architect to assist leading customers in deploying market-leading Synthesis, Place & Route, and Signoff technologies. This role involves driving technical evaluations, providing customer support, guiding tool utilization, and collaborating with R&D to influence next-generation product development. The ideal candidate will have 10+ years of hands-on experience in Digital Design and Static Timing Analysis, proficiency with IC digital implementation flows, and expertise in scripting languages like Tcl, Perl, Python, or shell. Experience with advanced nodes (5nm and below) and strong customer-facing communication skills are essential.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
As an expert Digital Implementation Field Applications Engineer (AE) , you will work side-by-side with our leading edge customers. With your expertise, you'll help deploy Cadence’s market-leading technologies in Synthesis, P&R, and Signoff to meet/exceed their PPA targets, achieve faster design closure, and turn their design concepts into reality. The greater your powers, the more business opportunities you'll help bring to the table. You will also work directly with the Cadence R&D group to drive the customer requirements and influence the direction of Cadence next-generation products and technologies.
Key Responsibilities
- Explore and Deploy Latest PPA methodologies/flows on Next generation Customer Designs
- Drive technical evaluations/benchmarks to success
- Provide technical support to Cadence customers in the areas of Backend Digital Design Implementation and Signoff
- Guide customers on how to best utilize Cadence technologies to achieve their design goals and meet project schedules
- Work closely with R&D to enhance the tools and methodologies to meet and exceed customer’s requirements
- Drive adoption and proliferation of Cadence tools and technologies
- Efficiently translate customer requirements into tool solutions by working closely with R&D
Job Requirements
- Minimum 10+ years of industry, hands on experience in Digital Design and Static Timing Analysis
- Prior experience with IC digital implementation flows - Synthesis, Place and Route, IR Drop, Timing Signoff
- Prior experience with Cadence tools (Genus, Innovus, Conformal, Tempus, Modus, Voltus) or ICC, ICC2, DC, FC , Primetime
- Experience with advanced nodes 5nm and below
- Expertise in scripting languages as Tcl/Perl/Python/shell is a must
- Strong customer-facing communication and problem-solving skills
- Strong verbal, written, and customer communication skills
- BS degree (or higher) in Computer/Electrical Engineering
The annual salary range for California is $162,400 to $301,600. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
